ASIM
MAIL [PRINT]
Equipe | Recherche | Education | Liens 
search for  

  Equipe
     Accès
     Annuaire
     Distinctions
     Séminaires

  Recherche
   Système
     Disydent
     HighPerf
     Steps
     Optimisation
     Formal verif
     Spin
     Soclib
   Back-End
     Alliance
     Coriolis
     Verif
     Aner
   Analog IC&Tools
     Cairo
     Oceane
   Publications
   Theses
   Offres de stage
   Offres de post-doc

  Education
     Master
     Plannings
     DEA
     DESS
     Maitrise
     Documentation

  Liens
     CERME
     GdrCAO
     SocLib
     MPC
     LIP6
     UPMC
     CNRS
     UFR Info
     Edite
     CCR

  Intranet
(This page is best viewed with CSS style sheets enabled)
 » Asim  » cosy  » Archive

CODESIGN
SIMULATION & SYNTHESIS

Archive

[Homepage of Cosy]
©bero

Content

Note: Date: YYMM - R: Release# - A: Access Rights (Public=1; EC=2; COSY only=3; Philips only=4; Private=5). Contact cosy web-master for request for protected documents.

Project Programme
Date Name R A Description
9708cosypp11.02 Project Programme Part I - Financial and Administrative Data (EC contract)
word95
9708cosypp21.02 Project Programme Part II - Description of RTD Project (EC contract)
word95
9708cosyppa1.02 Project Programme Attachment (EC Contract). Includes detailed description of tasks, deliverables and milestones
word95
9708cosy13081.03 Project Programme Workplan. Gantt-charts and resources allocation
mpp4.0 - ps (year 1)
Return

Progress Reports
Date Name R A Description
9804d611po98141.02 1st Six-Monthly Progress Report. Period 1 October 1997 to 31 March 1998
word97
9810d612po98431.02 2nd Six-Monthly Progress Report. Period 1 April 1997 to 30 September 1998
word97
Return

EC Reviews
Date Name R A Description
9807d611po98271.02 Slides presented at First EC COSY Review. Brussels, 7 July 1998. Includes: Project description; Highlights for 1st period; Presentations of partners; Initial exploitation plans; Workplan status and forecast; Technical summary on completed tasks; Ongoing specification tasks
pp95 (zip archive) - txt (index)
9809d611po98391.02 1st EC Review Reports.
Marco Cecchini, EC (html) - Franz Fink, Motorola (html) - Jean-Paul Calvez, Ireste (html)
word97 (zip archive)
Return

Publications
Date Name R A Description
9709esscirc97381.01 Introduction to the scope and initial vision of COSY. Slides presented at the ESSCIRC'97 Codesign Workshop; Southampton 16 Sept. 1997.
ppt95
9809emmsec98391.01 COSY: a methodology for system design based on reusable hardware & software IP's. Presented at EMMSEC'98; Bordeaux France 28-30 Sept. 1998.
In Proceedings pp. 709-716 word97 - Slides of Presentation ppt95
Return

Press Coverage
Date Name R A Description
9806eetimes9823-1 In EETimes 5 June 1998. Article from Cadence on Felix following DAC presentation, mentionning COSY for advanced research.
htm
9810eetimes9840-1 In EETimes 1 October 1998. Article from Peter Clarke following the presentation of COSY at EMMSEC'98.
htm
Return

Technical Reports
Date Name R A Description
9703d111po9814_11.02 D1.1.1 - Part I; Common Definition of Terms and Abstaction Levels
word97
9703d111po9814_21.02 D1.1.1 - Part II; Description of Background Technologies. Includes Philips: PRISC, TSS, Phideo; Cadence: Felix; UPMC: FSMD Synth.; SIE: Weaver
word97
9804d121po9814_11.02 D1.2.1 - Part I; Benchmark Description Rules. Organization of the collection of benchmarks; Definition of metrics
word97
9804d121po9814_21.02 D1.2.1 - Part II; Philips DVB Benchmark Suite. Includes MPEG Variable Length decoder; golden reference with TSS
word97 - See Software
9804d121po9814_31.02 D1.2.1 - Part III; Siemens CTL & RP Benchmark Suites. Includes PCI-SCSI-Controller; Elliptic Wave Filter
word97
9806d122po9827_11.02 D1.2.2 - Part I; Technology Assessment of Felix Alpha 5.0 on Philips' VLD Benchmarks
word97
9806d122po9827_21.02 D1.2.2 - Part II; Technology Assessment of Felix Alpha 5.0 on Siemens' CTL Benchmarks
word97
9806d122po9827_31.02 D1.2.2 - Part III; Technology Assessment; Questions & Answers on Felix Alpha 5.0
word97
9810d131po9843_11.02 D1.3.1 - Part I; Requirements for Philips' VideoTop Demonstrator. Covers the functionality of the target application, as well as the computation model, the architecture template and the design activities and models to be supported.
word97
9810d131po9843_21.02 D1.3.1 - Part II; Requirements for Siemens' Demonstrator. Control application in the domain of home automation, agricultural and building machinery.
word97
9810d131po9843_31.02 D1.3.1 - Part III; Requirements for Methods and Tools. Set after the technology assessment phase, in particular Felix Alpha June'98.
word97
9810d141po98431.02 D1.4.1; Specification of Architecture Template. Includes specification of a set of communication primitives for heterogeneous applications combining control and signal processing functions.
word97
9810d151po98431.02 D1.5.1; Specification of Extensions to Felix. Includes extensions to the computation model and to software performance estimation techniques.
word97
9810d161po98451.02 D1.6.1; Specification of Extensions to TSS. Includes Felix / TSS links.
word97
9810d162po98421.02 D1.6.2; FSMD Synthesis Specification. Ugh by UPMC.
word97
9810d171po98401.02 D1.7.1; Specification of the Fast Prototyping Platform.
word97
9810d181po98431.02 D1.8.1; Specification of Philips'Demonstrator: the COSY Digital VideoTop.
word97
9810d191po98401.02 D1.9.1; Specification of Siemens' Demonstrator.
word97
9806d711po98271.02 D7.1.1; Initial Exploitation Plan
word97
Return

Drafts
Date Name R A Description
9807FELIX-5 Felix.
9805; Draft specification documents content
9805; Modeling Guide Draft 2; Product Version 1.0 Pre-alpha pdf
9807; VCC (aka Felix) Scope pdf
9807; VCC Initiatives for V1.2 release pdf
9810ECL-4 Esterel-C.
9806; ECL and the "Embedded Wait Problem"; Ellen Sentovich; CEL/PHI Meeting June 1998 ppt97
9810; ECL: A specification environment for system-level design; Ellen Sentovich and Luciano Lavagno; Cadence Berkeley Labs; October 16 1998 (article) ps
9810; See also Esterel
9806d141upmc98230.13 D1.4.1 - Part II; Spec. PIBUS Communication Mechanisms.
Master Interface Module ps - Slave Interface Module ps - Master & Slave Interfaces; examples word97 - Control Unit ps - Interrupt Controler word97 -
Return

External Sources
Date Name R A Description
9708PRISC3.14 PRISC Architecture Framework; PIBUS Specification. Philips Semiconductors ASG/ESTC
ps
9802RASSP-Terminology-1 RASSP VHDL Modeling, Terminology and Taxonomy.
link
9806VSI-VCI0.34 Spec. Virtual Component Interface (VCI). Draft proposal by VSI Alliance On-Chip-Group.
word97
9806VSI-Glossary-1 VSI Alliance Glossary
link
9810ESTEREL-1 Esterel key documents
Foundation paper ftp - Primer ftp - Web Site link
Return

Software
Date Name R A Description
9709d121po9814_2s1.03 D1.2.1 - Part II; Philips DVB Benchmark Suite. Benchmarking programs, complete with TSS reference
C (zip archive) - See Report
Return

Miscellaneous
Date Name R A Description
9803cosyTemplate_w1.03 COSY Templates - Reports
word95
9803cosyTemplate_p1.03 COSY Templates - Slides
pp95
Return
© COSY EP 25443 - 1997, 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the written consent of the copyright owner

Last Updated Thu Nov 5 1998. Send comments to cosy web-master

Envoyez le lien - Imprimer ce document  
Web Site © 1995-2004 ASIM/LIP6/UPMC
W3C Validation HTML - CSS - Links

Last modified on 10/11/1998