The Soclib Project : A modelisation & simulation platform for System on Chip Design

13 french laboratories joined - under the french CNRS supervision - to develop an open library of interoperable simulation models for IP cores. The goal is to provide an open SOC modelization and simulation platform for both academic laboratories and industrial companies. About one year has been necessary from january 2002 til december 2002 to define the SOCLIB principles.

More information is available on The Soclib Project web site