Changes between Version 5 and Version 6 of DsxMapping


Ignore:
Timestamp:
Jul 5, 2011, 10:16:36 AM (14 years ago)
Author:
joel
Comment:

update to match the new doc

Legend:

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  • DsxMapping

    v5 v6  
    7171
    7272 * Mandatory arguments:
    73    * `desc`:
    74      A memory Segment to put the memspace's description in. This description won't be written to.
    75      Segment may be read-only memory.
    7673   * `buffer`:
    77      A memory Segment to put data in.
     74     A memory Segment to put data in. This may be cacheable.
    7875 * Example:
    7976{{{
    8077mapper.map( "memsp",
    81             desc   = mapper.hard.cram1,
    8278            buffer = mapper.hard.cram1)
    8379}}}
     
    8682
    8783 * Mandatory arguments:
    88    * `lock`:
     84   * `segment`:
    8985     A memory Segment to put the lock in.
    9086 * Example:
    9187{{{
    9288mapper.map( "lock0",
    93             lock = mapper.hard.cram1)
     89            segment = mapper.hard.cram1)
    9490}}}
    9591
     
    9793
    9894 * Mandatory arguments:
     95   * `buffer`:
     96     A memory Segment to put the data buffer in. This may be cacheable.
     97   * `status`:
     98     A memory Segment to put dynamic status and buffer in. This must be cacheable. Software Mwmr
     99     protocol implementations do explicit cachelines flushing.
     100 * Optional argument:
    99101   * `lock`:
    100102     A Locks dedicated hardware component, like SocLib's Locks component. Uses one lock.
    101    * `desc`:
    102      A memory Segment to put the channel's description in. This description won't be written to.
    103      Segment may be read-only memory.
    104    * `status`:
    105      A memory Segment to put dynamic status and buffer in. This must be cacheable. Software Mwmr
    106      protocol implémentations do explicit cachelines flushing.
    107103 * Example:
    108104{{{
     
    110106            lock    = mapper.hard.locks,
    111107            status  = mapper.hard.cram1,
    112             desc    = mapper.hard.cram1)
     108            buffer  = mapper.hard.cram1)
    113109}}}
    114110
     
    116112
    117113 * Mandatory arguments:
    118    * `desc`:
    119      A memory Segment to put the processor's description in. This description won't be written to.
    120      Segment may be read-only memory.
    121    * `status`:
    122      A memory Segment to put dynamic status in. This must be uncached as it is used to implement
     114   * `private`:
     115     A memory Segment to put the processor's private data in. This should be cacheable.
     116   * `shared`:
     117     A memory Segment to put shared status in. This must be uncached as it is used to implement
    123118     inter-cpu communication.
    124    * `priv`:
    125      A memory Segment to put the processor's private data in. This should be cacheable.
    126119 * Optional arguments:
    127120   * `tty` and `tty_no`: name of a segment associated to a multi_tty and the
     
    130123{{{
    131124mapper.map("processor",
    132             desc    = mapper.hard.cram0,
    133             priv    = mapper.hard.cram0,
    134             status  = mapper.hard.uram0)
     125            private = mapper.hard.cram0,
     126            shared  = mapper.hard.uram0)
    135127}}}
    136128
     
    138130
    139131 * Mandatory arguments:
    140    * `desc`:
    141      A memory Segment to put the os' description in. This description won't be written to.
    142      Segment may be read-only memory.
     132   * `private`:
     133     A memory Segment where to put private data. It may be cached.
    143134   * `shared`:
    144      A memory Segment to put os' global data in. This must be uncached as it is used to implement
     135     A memory Segment to put shared data in. This must be uncached as it is used to implement
    145136     inter-process communication.
    146137   * `code`:
     
    154145{{{
    155146mapper.map(mapper.tcg,
    156             desc    = mapper.hard.cram1,
     147            private = mapper.hard.cram1,
    157148            shared  = mapper.hard.uram1,
    158149            code    = mapper.hard.cram1)