Version 5 (modified by 17 years ago) (diff) | ,
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SocLib is an open IP-core library, with at least 3 implementations:
- CABA (Bit cycle accurate) in [SystemC]
- Tlm-T (Transaction level modeling with time) in SystemC
- RTL (Register transfer layer) in Vhdl or Verilog
Many IPs are defined, in which:
- CPUs (PPC, OpenRisc, Mips, ...)
- Rams, Roms, ...
- Interconnection components (Micro-networks on chip (NoC) and Buses)
- VCI
- PI-Bus
- Dedicated components for application support
It may be obtained on https://www-asim.lip6.fr/trac/soclib
At the moment, DSX requires Turquoise branch from SoCLib. Get it from https://www-asim.lip6.fr/svn/soclib/branches/turquoise/soclib